/*! Copyright(c) 2008-2012
 *
 *\file		Stm8s_spi.h
 *\brief		
 *\details	
 *
 *\author	Cai Peifeng
 *\version	
 *\date		09Jun12
 *
 *\warning	
 *
 *\history \arg	09Jun12, Cai Peifeng, Create the file
 */
#ifndef __STM8S_SPI_H__
#define __STM8S_SPI_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "Stm8s.h"


/** @addtogroup SPI_Registers_Reset_Value
  * @{
  */

#define SPI_CR1_RESET_VALUE    ((uint8_t)0x00) /*!< Control Register 1 reset value (add by Cai Peifeng:2012-6-9 16:3:38)*/
#define SPI_CR2_RESET_VALUE    ((uint8_t)0x00) /*!< Control Register 2 reset value (add by Cai Peifeng:2012-6-9 16:3:58)*/
#define SPI_ICR_RESET_VALUE    ((uint8_t)0x00) /*!< Interrupt Control Register reset value (add by Cai Peifeng:2012-6-9 16:4:7)*/
#define SPI_SR_RESET_VALUE     ((uint8_t)0x02) /*!< Status Register reset value (add by Cai Peifeng:2012-6-9 16:4:17)*/
#define SPI_DR_RESET_VALUE     ((uint8_t)0x00) /*!< Data Register reset value (add by Cai Peifeng:2012-6-9 16:4:25)*/
#define SPI_CRCPR_RESET_VALUE  ((uint8_t)0x07) /*!< Polynomial Register reset value (add by Cai Peifeng:2012-6-9 16:4:30)*/
#define SPI_RXCRCR_RESET_VALUE ((uint8_t)0x00) /*!< RX CRC Register reset value (add by Cai Peifeng:2012-6-9 16:4:37)*/
#define SPI_TXCRCR_RESET_VALUE ((uint8_t)0x00) /*!< TX CRC Register reset value (add by Cai Peifeng:2012-6-9 16:4:44)*/

/**
  * @}
  */

/** @addtogroup SPI_Registers_Bits_Definition
  * @{
  */

#define SPI_CR1_LSBFIRST ((uint8_t)0x80) /*!< Frame formate mask (add by Cai Peifeng:2012-6-9 16:9:9)*/
#define SPI_CR1_SPE		 ((uint8_t)0x40) /*!< Enable bits mask (add by Cai Peifeng:2012-6-9 16:10:2)*/
#define SPI_CR1_BR		 ((uint8_t)0x38) /*!< Baud rate control mask (add by Cai Peifeng:2012-6-9 16:10:39)*/
#define	SPI_CR1_MSTR	 ((uint8_t)0x04) /*!< master selection mask (add by Cai Peifeng:2012-6-9 16:11:30)*/
#define SPI_CR1_CPOL	 ((uint8_t)0x02) /*!< Clock Polarity mask (add by Cai Peifeng:2012-6-9 16:12:3)*/
#define SPI_CR1_CPHA	 ((uint8_t)0x01) /*!< Clock Phase mask (add by Cai Peifeng:2012-6-9 16:12:37)*/

#define SPI_CR2_BDM		 ((uint8_t)0x80) /*!< Bi-directional data mode enable mask (add by Cai Peifeng:2012-6-9 16:13:31)*/
#define SPI_CR2_BDOE	 ((uint8_t)0x40) /*!< Bi-directional enable output mask (add by Cai Peifeng:2012-6-9 16:14:7)*/
#define SPI_CR2_CRCEN    ((uint8_t)0x20) /*!< Hardware crc calculation enable mask (add by Cai Peifeng:2012-6-9 16:15:18)*/
#define SPI_CR2_CRCNEXT	 ((uint8_t)0x10) /*!< Transmit next CRC mask (add by Cai Peifeng:2012-6-9 16:16:11)*/
#define SPI_CR2_RXONLY	 ((uint8_t)0x04) /*!< Only Receive mask (add by Cai Peifeng:2012-6-9 16:17:28)*/
#define SPI_CR2_SSM		 ((uint8_t)0x02) /*!< Software slave manage mask  (add by Cai Peifeng:2012-6-9 16:17:48)*/
#define SPI_CR2_SSI		 ((uint8_t)0x01) /*!< Internel Slave device selection mask (add by Cai Peifeng:2012-6-9 16:18:1)*/

#define SPI_ICR_TXIE	 ((uint8_t)0x80) /*!< Tx empty interrupt enable mask (add by Cai Peifeng:2012-6-9 16:20:5)*/
#define SPI_ICR_RXIE	 ((uint8_t)0x40) /*!< Rx not empty interrupt enable mask (add by Cai Peifeng:2012-6-9 16:20:30)*/
#define SPI_ICR_ERRIE	 ((uint8_t)0x20) /*!< Error interrupt enable mask (add by Cai Peifeng:2012-6-9 16:24:33)*/
#define SPI_ICR_WKIE	 ((uint8_t)0x10) /*!< Wakeup interrupt enable mask (add by Cai Peifeng:2012-6-9 16:24:50)*/

#define SPI_SR_BSY		 ((uint8_t)0x80) /*!< Busy flag mask (add by Cai Peifeng:2012-6-9 16:31:15)*/
#define SPI_SR_OVR		 ((uint8_t)0x40) /*!< Over flow flag mask (add by Cai Peifeng:2012-6-9 16:31:31)*/
#define SPI_SR_MODF		 ((uint8_t)0x20) /*!< Mode Error mask (add by Cai Peifeng:2012-6-9 16:31:55)*/
#define SPI_SR_CRCERR	 ((uint8_t)0x10) /*!< CRC Error flag mask (add by Cai Peifeng:2012-6-9 16:32:22)*/
#define SPI_SR_WKUP		 ((uint8_t)0x08) /*!< Wakeup flag mask (add by Cai Peifeng:2012-6-9 16:32:55)*/
#define SPI_SR_TXE		 ((uint8_t)0x02) /*!< Transmit buffer empty  (add by Cai Peifeng:2012-6-9 16:33:15)*/
#define SPI_SR_RXNE		 ((uint8_t)0x01) /*!< Receive buffer not empty (add by Cai Peifeng:2012-6-9 16:33:34)*/


/*!
 *\enum		SPI_FirstBit_Typedef
 *\brief	SPI Frame Format	
*/
typedef enum 
{
	SPI_FIRSTBIT_MSB = (uint8_t)0x00, /*!<  (add by Cai Peifeng:2012-6-9 16:45:17)*/
	SPI_FIRSTBIT_LSB = (uint8_t)0x80 /*!<  (add by Cai Peifeng:2012-6-9 16:45:20)*/
}SPI_FirstBit_Typedef;


/*!
 *\enum		SPI_BaudRatePrescaler_TypeDef
 *\brief	SPI BaudRate control 	
*/
typedef enum
{
	SPI_BAUDRATEPRESCALER_2   = (uint8_t)0x00,  /*!< spi frequency = f(cpu)/2(add by Cai Peifeng:2012-6-9 16:57:41)*/
	SPI_BAUDRATEPRESCALER_4   = (uint8_t)0x08,  /*!< spi frequency = f(cpu)/4 (add by Cai Peifeng:2012-6-9 16:57:44)*/
	SPI_BAUDRATEPRESCALER_8   = (uint8_t)0x10,  /*!< spi frequency = f(cpu)/8 (add by Cai Peifeng:2012-6-9 16:57:46)*/
	SPI_BAUDRATEPRESCALER_16  = (uint8_t)0x18,  /*!< spi frequency = f(cpu)/16 (add by Cai Peifeng:2012-6-9 16:57:58)*/
	SPI_BAUDRATEPRESCALER_32  = (uint8_t)0x20,  /*!< spi frequency = f(cpu)/32 (add by Cai Peifeng:2012-6-9 16:58:6)*/
	SPI_BAUDRATEPRESCALER_64  = (uint8_t)0x28,  /*!< spi frequency = f(cpu)/64 (add by Cai Peifeng:2012-6-9 16:58:13)*/
	SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x30,  /*!< spi frequency = f(cpu)/128 (add by Cai Peifeng:2012-6-9 16:58:22)*/
	SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x38   /*!< spi frequency = f(cpu)/256 (add by Cai Peifeng:2012-6-9 16:58:38)*/
}SPI_BaudRatePrescaler_TypeDef;


typedef enum
{
	SPI_MODE_MASTER = (uint8_t)0x04, /*!<master  (add by Cai Peifeng:2012-6-9 17:6:28)*/
	SPI_MODE_SLAVE  = (uint8_t)0x00	 /*!<  (add by Cai Peifeng:2012-6-9 17:6:31)*/
}SPI_Mode_Typedef;



/*!
 *\enum		SPI_ClockPolarity_TypeDef
 *\brief	clock polarity selection	
*/
typedef enum
{
	SPI_CLOCKPOLARITY_LOW  = (uint8_t)0x00, /*!< keep 0 when idle (add by Cai Peifeng:2012-6-9 22:57:28)*/
	SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x02	/*!< keep 1 when idle (add by Cai Peifeng:2012-6-9 22:57:47)*/
}SPI_ClockPolarity_TypeDef;


/*!
 *\enum		SPI_ClockPhase_Typedef
 *\brief	clock phase selection	
*/
typedef enum
{
	SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00, /*!< capture the data from the first clock transition  (add by Cai Peifeng:2012-6-9 23:1:25)*/
	SPI_CLOCKPHASE_2EDGE = (uint8_t)0x01  /*!< capture the data from the second clock transition (add by Cai Peifeng:2012-6-9 23:1:40)*/
}SPI_ClockPhase_Typedef;


/*!
 *\enum		SPI_DataDirction_Typedef
 *\brief	Data Direction mode	
*/
typedef enum
{
	SPI_DATADIRECTION_2LINES_FULLDUPLEX  = (uint8_t)0x00,  /*!< 2-line uni-directionnal data mode  (add by Cai Peifeng:2012-6-9 23:8:50)*/
	SPI_DATADIRECTION_2LINES_RXONLY 	 = (uint8_t)0x04,  /*!< Receive only in 2 line (add by Cai Peifeng:2012-6-9 23:10:23)*/
	SPI_DATADIRECTION_1LINE_RX			 = (uint8_t)0x80,  /*!< Receive only in 1 line (add by Cai Peifeng:2012-6-9 23:12:0)*/
	SPI_DATADIRECTION_1LINE_TX			 = (uint8_t)0xC0  /*!<  Transmit only in 1 line (add by Cai Peifeng:2012-6-9 23:12:20)*/
}SPI_DataDirction_Typedef;


/*!
 *\enum		SPI_NSS_TypeDef
 *\brief		
*/
typedef enum
{
	SPI_NSS_SOFT = (uint8_t)0x02, /*!< Software slave management enable (add by Cai Peifeng:2012-6-9 23:25:18)*/
	SPI_NSS_HARD = (uint8_t)0x00, /*!< Software slave management disable (add by Cai Peifeng:2012-6-9 23:25:28)*/
}SPI_NSS_TypeDef;


typedef enum
{
	SPI_DIRECTION_RX = (uint8_t)0x00, /*!< Selects Rx receive direction in bi-directional mode (add by Cai Peifeng:2012-6-9 23:37:12)*/
	SPI_DIRECTION_TX = (uint8_t)0x01, /*!< Selects Tx transmission direction in bi-directional mode (add by Cai Peifeng:2012-6-9 23:37:32)*/
}SPI_Direction_TypeDef;


typedef enum
{
	SPI_CRC_RX = (uint8_t)0x00, /*!< select rx crc register (add by Cai Peifeng:2012-6-9 23:43:13)*/
	SPI_CRC_TX = (uint8_t)0x01, /*!< select tx crc register (add by Cai Peifeng:2012-6-9 23:43:23)*/
}SPI_CRC_TypeDef;


typedef enum
{
	SPI_FLAG_BSY  	= (uint8_t)0x80, /*!< Busy flag (add by Cai Peifeng:2012-6-9 23:46:57)*/
	SPI_FLAG_OVR  	= (uint8_t)0x40, /*!< Overrun flag (add by Cai Peifeng:2012-6-9 23:48:43)*/
	SPI_FLAG_MODF 	= (uint8_t)0x20, /*!< Mode fault (add by Cai Peifeng:2012-6-9 23:49:38)*/ 
	SPI_FLAG_CRCERR = (uint8_t)0x10, /*!< CRC error flag (add by Cai Peifeng:2012-6-9 23:50:5)*/
	SPI_FLAG_WKUP	= (uint8_t)0x08, /*!< Wake-up flag (add by Cai Peifeng:2012-6-9 23:50:22)*/
	SPI_FLAG_TXE	= (uint8_t)0x02, /*!< Transmit buffer empty (add by Cai Peifeng:2012-6-9 23:50:36)*/
	SPI_FLAG_RXNE	= (uint8_t)0x01  /*!< Receive buffer empty (add by Cai Peifeng:2012-6-9 23:51:11)*/
}SPI_Flag_TypeDef;


typedef enum
{
	SPI_IT_WKUP 	= (uint8_t)0x34, /*!< Wake-up interrupt (add by Cai Peifeng:2012-6-10 7:12:45)*/
	SPI_IT_OVR		= (uint8_t)0x65, /*!< Overrun interrupt (add by Cai Peifeng:2012-6-10 7:13:1)*/
	SPI_IT_MODF		= (uint8_t)0x55, /*!< Mode fault interrupt (add by Cai Peifeng:2012-6-10 7:13:14)*/
	SPI_IT_CRCERR	= (uint8_t)0x45, /*!< CRC error interrupt (add by Cai Peifeng:2012-6-10 7:13:29)*/
	SPI_IT_TXE		= (uint8_t)0x17, /*!< Transmit buffer empty interrupt (add by Cai Peifeng:2012-6-10 7:13:42)*/
	SPI_IT_RXNE		= (uint8_t)0x06, /*!< Receive buffer not empty interrrupt  (add by Cai Peifeng:2012-6-10 7:13:56)*/
	SPI_IT_ERR		= (uint8_t)0x05 /*!<  Error interrupt (add by Cai Peifeng:2012-6-10 7:14:9)*/
}SPI_IT_TypeDef;


/**
  * @brief  Macro used by the assert_param function in order to check the data direction mode 
values
  */
#define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \
                                        ((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \
                                        ((MODE) == SPI_DATADIRECTION_1LINE_RX) || \
                                        ((MODE) == SPI_DATADIRECTION_1LINE_TX))
	/**
	  * @brief	Macro used by the assert_param function in order to check the mode 
	  * 		half duplex data direction values
	  */
#define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \
											((DIRECTION) == SPI_DIRECTION_TX))

/**
  * @brief  Macro used by the assert_param function in order to check the NSS 
  *         management values
  */
#define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \
                                        ((NSS) == SPI_NSS_HARD))

/**
  * @brief  Macro used by the assert_param function in order to check the different
  *         sensitivity values for the CRC polynomial
  */
#define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00)

/**
  * @brief  Macro used by the assert_param function in order to check the SPI Mode values
  */
#define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \
                              ((MODE) == SPI_MODE_SLAVE))

/**
  * @brief  Macro used by the assert_param function in order to check the baudrate values
  */
#define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
    ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))

/**
  * @brief  Macro used by the assert_param function in order to check the polarity values
  */
#define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \
                                    ((CLKPOL) == SPI_CLOCKPOLARITY_HIGH))

/**
  * @brief  Macro used by the assert_param function in order to check the phase values
  */
#define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \
                                 ((CLKPHA) == SPI_CLOCKPHASE_2EDGE))

/**
  * @brief  Macro used by the assert_param function in order to check the first 
  *         bit to be transmited values
  */
#define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
                                 ((BIT) == SPI_FIRSTBIT_LSB))

/**
  * @brief  Macro used by the assert_param function in order to check the CRC 
  *         Transmit/Receive
  */
#define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \
                            ((CRC) == SPI_CRC_RX))

/**
  * @brief  Macro used by the assert_param function in order to check the 
  *         different flags values
  */
#define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \
                               ((FLAG) == SPI_FLAG_MODF) || \
                               ((FLAG) == SPI_FLAG_CRCERR) || \
                               ((FLAG) == SPI_FLAG_WKUP) || \
                               ((FLAG) == SPI_FLAG_TXE) || \
                               ((FLAG) == SPI_FLAG_RXNE) || \
                               ((FLAG) == SPI_FLAG_BSY))

/**
  * @brief  Macro used by the assert_param function in order to check the 
  *         different sensitivity values for the flag that can be cleared 
  *         by writing 0
  */
#define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \
                                     ((FLAG) == SPI_FLAG_WKUP))

/**
  * @brief  Macro used by the assert_param function in order to check the 
  *        different sensitivity values for the Interrupts
  */
#define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE)  || \
                                        ((Interrupt) == SPI_IT_RXNE)  || \
                                        ((Interrupt) == SPI_IT_ERR) || \
                                        ((Interrupt) == SPI_IT_WKUP))

/**
  * @brief  Macro used by the assert_param function in order to check the 
  *         different sensitivity values for the pending bit
  */
#define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR)  || \
                                        ((ITPendingBit) == SPI_IT_MODF) || \
                                        ((ITPendingBit) == SPI_IT_CRCERR) || \
                                        ((ITPendingBit) == SPI_IT_WKUP) || \
                                        ((ITPendingBit) == SPI_IT_TXE)  || \
                                        ((ITPendingBit) == SPI_IT_RXNE))

/**
  * @brief  Macro used by the assert_param function in order to check the 
  *         different sensitivity values for the pending bit that can be cleared
  *         by writing 0
  */
#define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \
    ((ITPendingBit) == SPI_IT_WKUP))


/*!
 *\fn			void SPI_DeInit();
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_DeInit();


/*!
 *\fn			void SPI_Init();
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_Init(SPI_FirstBit_Typedef FirstBit, SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, 
			SPI_Mode_Typedef Mode, SPI_ClockPolarity_TypeDef ClockPolarity, SPI_ClockPhase_Typedef ClockPhase, 
			SPI_DataDirction_Typedef Data_Direction, SPI_NSS_TypeDef Slave_Management,uint8_t CRCPolynomial);

/*!
 *\fn			void SPI_Cmd(FunctionalState NewState);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_Cmd(FunctionalState NewState);

/*!
 *\fn			void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState);

/*!
 *\fn			void SPI_SendData(uint8_t Data);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_SendData(uint8_t Data);

/*!
 *\fn			uint8_t SPI_ReceiveData(void);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
uint8_t SPI_ReceiveData(void);

/*!
 *\fn			void SPI_NSSInternalSoftwareCmd(FunctionalState NewState);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_NSSInternalSoftwareCmd(FunctionalState NewState);

/*!
 *\fn			void SPI_TransmitCRC(void);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_TransmitCRC(void);

/*!
 *\fn			void SPI_CalculateCRCCmd(FunctionalState NewState);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_CalculateCRCCmd(FunctionalState NewState);

/*!
 *\fn			uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC);

/*!
 *\fn			void SPI_ResetCRC(void);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_ResetCRC(void);

/*!
 *\fn			uint8_t SPI_GetCRCPolynomial(void);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
uint8_t SPI_GetCRCPolynomial(void);

/*!
 *\fn			void SPI_BiDirectionalLineConfig(SPI_DataDirction_Typedef SPI_Direction);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction);

/*!
 *\fn			FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG);

/*!
 *\fn			void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG);

/*!
 *\fn			ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT);

/*!
 *\fn			void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT);
 *\brief   
 *
 *\param[in]   
 *\param[out]  
 *
 *\return  
 *\retval  
 *
 *\note		  
 */
void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT);


#ifdef __cplusplus
}
#endif

#endif	/* __STM8S_SPI_H__ */
